The standard silicon on isolator (SOI) wafer has suffered from low thermal conductivity and, as result, from bad power performance. There are 2 reasons: low thermal conductivity of BOX(10W/K*m) and low thermal conductivity of host Silicon wafer (130W/K*m). If to change the BOX and Si by 3C-SiC (480 W/K*m) the power performance of Si devices will be improved in 3 times and leakage current reduced by 50%. New Si on SiC (SiSiC) wafer will be compatible with regular Si wafer processing.
ABOUT THE ENTRANT
Name: Joseph Kaplun
Type of entry: individual
Number of times previously entering contest:3
Patent status: none